Patterned sapphire substrate (PSS) is a critical material for improving the optoelectronic performance of III-nitride light-emitting diodes (LEDs). It effectively reduces the threading dislocation density (TDD) of GaN epitaxial layers, optimizes crystal quality, and enhances the light extraction efficiency (LEE) and light output power (LOP) of LED devices. With the rapid development of high-brightness, high-efficiency, and miniaturized LEDs, micro/nano fabrication of PSS has become a key research hotspot. Precise, low-cost, and high-yield micro/nano patterning techniques largely determine the morphological quality and functional performance of PSS. This review systematically summarizes the mainstream PSS fabrication technologies, including micrometer-scale etching and nanometer-scale pattern transfer approaches. The fabrication principles, procedural characteristics, technical advantages and limitations, and representative research advances of dry etching, wet etching, nanosphere lithography, anodic aluminum oxide (AAO) templating, and nanoimprint lithography (NIL) are comprehensively discussed. This work provides a technical reference for process optimization and performance innovation of PSS-based high-efficiency LEDs.
【Fig. 1】 Application of patterned sapphire substrates in III-nitride light-emitting diodes
1. Micrometer-Scale Etching Technologies for PSS Fabrication
Etching is the dominant approach for manufacturing micrometer-scale patterned sapphire substrates (MPSS). By mask patterning and substrate etching, predefined microscale textures can be accurately transferred onto sapphire surfaces. Conventional etching methods are categorized into dry etching and wet etching, which exhibit distinct differences in reaction mechanism, morphological controllability, production cost, and device enhancement effects, thus satisfying diverse application requirements.
【Fig. 2】 (a) Fabrication flowchart of conventional MPSS; (b) NPSS fabrication based on self-assembled monolayer SiO nanosphere template; (c) NPSS fabrication based on nanoimprint lithography
1.1 Dry Etching Technology
Dry etching, mainly including inductively coupled plasma (ICP) etching and reactive ion etching (RIE), is the mainstream industrial technique for MPSS mass production. It features superior anisotropic etching, high pattern accuracy, and smooth sidewall morphology, enabling the fabrication of diverse microstructures such as stripes, hemispheres, holes, and cones for high-power and high-brightness LED applications.
The dry etching process follows a standardized workflow. Firstly, hard mask materials including Ni, SiN, and SiO are deposited on c-plane sapphire, followed by photoresist spin-coating and standard photolithography to define microscale patterns. The mask layer is then opened via ICP or RIE etching. Finally, pattern transfer onto sapphire is realized using BCl/Cl plasma chemistry. Key structural parameters of PSS can be precisely regulated by adjusting gas flux, gas ratio, etching duration, and ICP/RIE power.
Numerous studies have verified the significant modulation effect of dry etching parameters on PSS morphology and LED performance. Hsu et al. deposited a 500 nm-thick Ni mask on c-plane sapphire and defined stripe patterns along the [1−100] crystallographic direction. By optimizing the BCl/(Cl+BCl) flux ratio, stripe-shaped PSS with 3 μm width, 100 nm depth, and 3 μm spacing was fabricated. The corresponding LED exhibited a 35% LOP enhancement at 20 mA compared with devices on flat sapphire substrates (FSS), attributed to the reduced TDD and improved LEE.
Chang et al. developed a hybrid process combining photolithography, thermal reflow, RIE, and ICP etching to prepare hemispherical PSS. Patterned PMMA templates were first fabricated via photolithography, and thermal reflow was adopted to form hemispherical PMMA architectures. The patterns were subsequently transferred to SiN masks by RIE, and sapphire was etched by BCl-based ICP plasma. The optimized hemispherical PSS possessed a diameter of 4.3 μm and a spacing of 0.5 μm. Comparative experiments demonstrated that although GaN epitaxial layers grown on hemispherical and stripe-shaped PSS achieved similar TDD levels, the tilted facets of hemispherical PSS further optimized light propagation, yielding a 13% higher LOP. Flexible switching between stripe and hemispherical microstructures was realized by tuning the thickness ratio of SiN and PMMA, greatly improving process compatibility.
Wang et al. fabricated periodic microhole array
PSS with 3 μm diameter and 3 μm spacing via standard photolithography and dry etching. An optimal etching depth of 1.5 μm was determined, and the optimized PSS-based LED achieved a 21% LOP improvement at 20 mA relative to FSS-based devices.
Our group has systematically investigated BCl/Ar plasma etching for MPSS fabrication using SiO masks. In pure BCl plasma, the sapphire etching rate increased with gas flow and peaked at 50 sccm, while a higher chamber pressure reduced the etching rate. Furthermore, the effects of ICP power, RF power, chamber pressure, and Cl/BCl ratio on GaN etching characteristics were explored. The optimal ICP conditions for LED mesa fabrication were determined as 300 W ICP power, 100 W RF power, 70 sccm total gas flow, and 90% Cl/10% BCl, which was also applicable to sapphire patterning. Based on these optimized parameters, cone-shaped PSS was fabricated via thermally reflowed photoresist and BCl-based ICP etching, effectively improving the efficiency and reliability of high-power LEDs.
1.2 Wet Etching Technology
Wet etching is a low-cost and scalable approach for MPSS manufacturing. It relies on high-temperature chemical corrosion of masked sapphire in acidic solutions, featuring high etching selectivity, zero plasma-induced damage, and low equipment cost. Due to the strong acid resistance of sapphire at room temperature, high-temperature heating is indispensable to drive the etching reaction. This method is widely used for fabricating pyramid-shaped and V-shaped PSS.
Li et al. prepared pyramid PSS via high-temperature wet etching using patterned SiO as the mask and concentrated HSO as the etchant at 250 °C. Three groups of pyramid structures with average sizes of 4.8 μm, 4.0 μm, and 2.2 μm were obtained. The dihedral angle between the c-plane and pyramid sidewall increased with the reduction of pyramid size, and the smallest pyramid PSS delivered the maximum LED LOP, confirming the size-dependent performance modulation effect.
Wang et al. investigated the performance enhancement of V-shaped PSS prepared by wet etching. A 300 nm-thick SiO layer was patterned via photolithography, and stripe-masked sapphire was etched at 400 °C in HSO solution. After removing residual SiO by HF treatment, V-shaped PSS with 3.5 μm ridge width and 6.5 μm period was obtained. Such structures reduced the contact area between GaN and sapphire, thereby lowering TDD and improving epitaxial crystal quality. Wu et al. further revealed the spacing-dependent growth behavior: GaN crystal quality was improved with decreasing V-groove spacing, whereas spacing below 0.41 μm caused insufficient nucleation sites and deteriorated crystalline integrity.
1.3 Comparative Analysis of Dry and Wet Etching
Dry and wet etching exhibit complementary characteristics in PSS fabrication. Dry etching provides superior anisotropy, high pattern precision, and excellent morphological controllability, making it suitable for high-precision and complex microstructure fabrication. Nevertheless, the physical ion bombardment effect leads to low etching selectivity between sapphire and masks, and plasma-induced surface contamination and lattice damage inevitably degrade the quality of subsequent GaN epitaxy.
Wet etching is based on pure chemical reactions without mechanical surface damage, achieving higher etching selectivity and lower production cost for large-scale manufacturing. However, its weak anisotropy results in inferior edge precision and morphological uniformity, limiting its application in high-accuracy micro/nano patterning.
2. Nanometer-Scale Pattern Transfer Technologies for NPSS
Despite the performance optimization brought by MPSS, the modulation capability of microscale structures is gradually saturated. Nanometer-scale patterned
sapphire substrates (NPSS) possess larger specific surface areas and stronger light field modulation ability, which can further break the performance bottleneck of LEDs. Traditional nanolithography techniques including electron beam lithography, focused ion beam lithography, and laser holography suffer from high cost and low throughput, restricting industrial applications. In contrast, nanosphere lithography, AAO templating, and nanoimprint lithography have become dominant NPSS fabrication methods due to their low cost and high throughput.
2.1 Nanosphere and AAO Templating Technologies
Nanosphere lithography fabricates uniform nano-patterns via self-assembled colloidal nanosphere templates combined with plasma etching, offering simple operation, low cost, and excellent large-area uniformity. Zhang et al. proposed a SiO nanosphere self-assembly strategy for NPSS fabrication. A monolayer of 600 nm-diameter SiO nanospheres was coated on sapphire and served as the etching mask. By modulating CF-based ICP etching duration (0 s, 90 s, 180 s), nanosphere spacings of 0 nm, 50 nm, and 120 nm were achieved, forming highly ordered nanoarray PSS.
Chen et al. fabricated high-precision NPSS with 450 nm diameter, 150 nm depth, and 50 nm spacing using polystyrene nanosphere lithography and Cl/BCl dry etching. High-resolution X-ray diffraction and etch pit density tests verified the improved GaN crystal quality. The NPSS-based LEDs exhibited 30% and 11% higher LOP than FSS-based and MPSS-based devices, respectively, demonstrating prominent optoelectronic enhancement.
AAO templating technology relies on electrochemical anodization to fabricate highly ordered, uniform, and size-tunable nanohole arrays. Featuring high structural regularity and process repeatability, AAO templates are reliable for high-throughput and scalable NPSS production.
2.2 Nanoimprint Lithography Technology
Nanoimprint lithography (NIL) overcomes the diffraction and scattering limitations of conventional optical lithography, enabling high-resolution, high-throughput, and low-cost nanofabrication without expensive precision exposure equipment. Apart from LED NPSS manufacturing, NIL is also applicable to organic light-emitting diodes, solar cells, and other optoelectronic devices, showing great industrialization potential.
The standardized NIL process for NPSS is as follows: a SiO hard mask is first deposited on sapphire, followed by spin-coating of imprint resist. Nano-patterns are defined by mechanical imprinting, thermal treatment, and UV curing. After residual resist removal, RIE etching transfers nano-patterns to the SiO mask, and subsequent wet etching realizes sapphire nanostructuring. Finally, the residual mask is stripped to obtain finished NPSS.
NIL-fabricated NPSS exhibits excellent device enhancement performance. By combining NIL and ICP etching, highly uniform hexagonal protruding NPSS was prepared. The corresponding blue LEDs achieved 2-fold photoluminescence (PL) and 2.8-fold electroluminescence (EL) intensity enhancement compared with FSS-based devices, validating the outstanding advantages of NIL in high-performance NPSS fabrication.
3. Conclusions and Outlook
PSS micro/nano fabrication technologies are essential for improving the optoelectronic performance of III-nitride LEDs. At present, micrometer-scale etching techniques have formed a mature complementary system: dry etching is suitable for high-precision and high-end device manufacturing, while wet etching satisfies low-cost large-scale mass production. In the nanoscale regime, nanosphere lithography, AAO templating, and NIL effectively address the high-cost and low-throughput drawbacks of traditional nanofabrication methods, significantly boosting LED performance.
Although MPSS techniques have been widely industrialized, NPSS still faces challenges including insufficient large-area uniformity and low fabrication yield. Future research will focus on the development of hybrid dry/wet etching processes, optimization of self-assembled nano-template uniformity, and improvement of NIL yield. The fabrication of micro/nano composite structured PSS will further reduce epitaxial defects and enhance light extraction efficiency, providing technical support for the industrial upgrading of high-brightness, high-efficiency, and long-lifetime LED devices.
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